Memory circuits may be classified in two main categories: volatile and nonvolatile. Volatile memory loses any data as soon as the system is turned off. Thus, it requires constant power to remain viable. Most types of random access memory (RAM) fall into this category. Non-volatile memory does not lose its data when the system or device is turned off. A non-volatile memory (NVM) device may be implemented as a MOS transistor that has a source, a drain, an access or a control gate, and a floating gate. It is structurally different from a standard MOSFET in its floating gate, which is electrically isolated, or “floating”.
Non-volatile memory arrays include a plurality of NVM cells arranged in rows and columns. In general, single-transistor n-channel NVM cells operate as follows. During an erase operation, electrons are removed from a floating gate of the NVM cell, thereby lowering the threshold voltage of the NVM cell. During a program operation, electrons are inserted into the floating gate of the NVM cell, thereby raising the threshold voltage of the NVM cell. Thus, during program and erase operations, the threshold voltages of selected NVM cells are changed. During a read operation, read voltages are applied to selected NVM cells. In response, read currents may flow through the selected NVM cells. The magnitudes of the read currents are dependent upon the threshold voltages of the selected NVM cells. In another configuration, output voltages of the NVM cells may be varied between two values based on the threshold voltages of those cells.